1. Field of Invention
This invention relates generally to semiconductor device packaging and more specifically to a compliant contact integrator for securing a bare semiconductor die and method for making same.
2. Description of the Related Art
In the manufacture of unpackaged semiconductor die it is often desirable to establish electrical connections between the bonding pads of the die and other electrical devices for testing or other purposes. For example, burn-in and full functionality tests are typically performed to certify each bare die as a known good die (KGD). During these test procedures, the bare die are loaded into a test carrier, which takes the place of a conventional plastic or ceramic semiconductor package. A typical test carrier consists of a die cavity plate that has a die cavity formed therein and a plurality of pins that extend from the die cavity plate for connection to test apparatus. The configuration of such a die cavity plate is similar to a standard ceramic dual in-line package (CERDIP). Prior to testing, a bare die is inserted into the die cavity and temporarily connected to communicate electrically with the external pins of the die cavity plate.
The die cavity plate is then connected to a particular test apparatus. These types of test apparatus typically include an interconnect component for establishing the temporary ohmic connection between the bare die and the pins of the test carrier. One example of such an interconnect component known in the art utilizes an interconnect formed on a silicon substrate with integrally formed silicon contact members. The integrally formed contact members are positioned and configured to contact the individual contact pads on the die, and the ultimate ohmic connection with the pins of the test carrier is made via bonding wires. Another type of interconnect component known in the art incorporates microbump contact members. The microbump contact members consist of metal bumps formed on conductor traces that are attached to an insulative film, such as polyimide. The microbumps are configured and spaced to make electrical contact with the bonding pads of the bare die. The conductor traces are adapted to establish a circuit path to the microbumps. The conductor traces are ordinarily electrically connected to the external pins of the test carrier via bonding wires. For forming the interconnect component, the combination of the insulative film with the microbumps and conductor traces attached thereto can be mounted to a rigid substrate.
There are certain disadvantages associated with each of the aforementioned interconnect components. The interconnect component formed on a silicon substrate with integrally formed silicon contact members requires complex, time-consuming, and costly semiconductor device fabrication techniques. The manufacturing process for the microbump interconnect component is similarly complicated and costly. In the typical process flow, the conductive traces are formed by electroplating a patterned metal layer on the insulating film or by laminating a layer of metal to the insulating film and, then, etching the metal layer to form the conductor traces. In either case, a masking step is required to outline the pattern for the conductor traces. After the conductor traces are formed, holes or vias are established in the insulating film and metal is electroplated into the vias to form the microbumps.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the aforementioned disadvantages.